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DTSTART:19700308T020000
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DTSTART:19701101T020000
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BEGIN:VEVENT
DTSTAMP:20181221T160725Z
LOCATION:D170
DTSTART;TZID=America/Chicago:20181111T111400
DTEND;TZID=America/Chicago:20181111T113000
UID:submissions.supercomputing.org_SC18_sess149_ws_mchpc104@linklings.com
SUMMARY:xBGAS: Toward a RISC-V ISA Extension for Global, Scalable, Shared 
 Memory
DESCRIPTION:Workshop\nMemory, NVRAM, Parallel Programming Languages, Libra
 ries, and Models, Workshop Reg Pass\n\nxBGAS: Toward a RISC-V ISA Extensio
 n for Global, Scalable, Shared Memory\n\nLeidel, Wang, Chen, Donofrio, Fat
 ollahi-Fard...\n\nGiven the switch from monolithic architectures to integr
 ated systems of commodity components, scalable high performance computing 
 architectures often suffer from unwanted latencies when operations depart 
 an individual device domain.  Transferring control and/or data across loos
 ely coupled commodity devices implies a certain degree of cooperating in t
 he form of complex system software.  The end result being a total system a
 rchitecture the operates with low degrees of efficiency.  \n\nThis work pr
 esents initial research into creating micro architecture extensions to the
  RISC-V instruction set that provide tightly coupled support for common hi
 gh performance computing operations.  This xBGAS micro architecture extens
 ion provides applications the ability to access globally shared memory blo
 cks directly from rudimentary instructions.  The end result is a highly ef
 ficient micro architecture for scalable shared memory programming environm
 ents.
URL:https://sc18.supercomputing.org/presentation/?id=ws_mchpc104&sess=sess
 149
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