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DTSTART:19700308T020000
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DTSTAMP:20181221T160742Z
LOCATION:D221
DTSTART;TZID=America/Chicago:20181113T134500
DTEND;TZID=America/Chicago:20181113T140000
UID:submissions.supercomputing.org_SC18_sess278_drs111@linklings.com
SUMMARY:Using Integrated Processor Graphics to Accelerate Concurrent Data 
 and Index Structures
DESCRIPTION:Doctoral Showcase\nCompilers, Data Analytics, Data Management,
  GPUs, MPI, OS and Runtime Systems, Workshop Reg Pass, Tutorial Reg Pass, 
 Tech Program Reg Pass, Exhibits Reg Pass, Exhibits - Exhibit Hall Only Reg
  Pass, Doctoral Showcase\n\nUsing Integrated Processor Graphics to Acceler
 ate Concurrent Data and Index Structures\n\nFuentes, Scherson\n\nWith the 
 advent of computing systems with on-die integrated processor graphics (iGP
 U), new programming challenges have emerged from these heterogeneous syste
 ms. We proposed different data and index structure algorithms that can ben
 efit from the Intel's iGPU architecture and the C for Media (CM) programmi
 ng model. We aim that certain data structures can run on the iGPU more eff
 iciently than the CPU cores, achieving important performance gains and ene
 rgy savings. To the best of our knowledge, this is the first attempt to us
 e iGPU for running workloads on concurrent data and index structures. Expe
 rimental results show speedups of up to 4x on concurrent data structures a
 nd 11x on index structures when comparing with state-of-the-art CPU implem
 entations. Energy savings of up to 300% are also obtained when running the
 se algorithms on iGPU.
URL:https://sc18.supercomputing.org/presentation/?id=drs111&sess=sess278
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