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DTSTART:19700308T020000
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DTSTAMP:20181221T160904Z
LOCATION:C2/3/4 Ballroom
DTSTART;TZID=America/Chicago:20181113T083000
DTEND;TZID=America/Chicago:20181113T170000
UID:submissions.supercomputing.org_SC18_sess322_post213@linklings.com
SUMMARY:Programming the EMU Architecture: Algorithm Design Considerations 
 for Migratory-Threads-Based Systems
DESCRIPTION:Poster\nTech Program Reg Pass, Exhibits Reg Pass\n\nProgrammin
 g the EMU Architecture: Algorithm Design Considerations for Migratory-Thre
 ads-Based Systems\n\nBelviranli, Lee, Vetter\n\nThe decades-old memory bot
 tleneck problem for data-intensive applications is getting worse as the pr
 ocessor core counts continue to increase. Workloads with sparse memory acc
 ess characteristics only achieve a fraction of a system's total memory ban
 dwidth. EMU architecture provides a radical approach to the issue by migra
 ting the computational threads to the location where the data resides. \n\
 nIn EMU architecture, data distribution and thread creation strategies pla
 y a crucial role in achieving optimal performance in the EMU platform. In 
 this work, we identify several design considerations that need to be taken
  care of while developing applications for the new architecture and we eva
 luate their performance effects on the EMU-chick hardware.
URL:https://sc18.supercomputing.org/presentation/?id=post213&sess=sess322
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